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The a8���� 7130E and L Series devices leverage the latest FPGA technology to enable the development and deployment of cutting-edge network applications. a8���� provides a set of mature development kits as well as IP Cores to enable firms to build their own applications based on these building blocks.

a8���� 7130 FPGA Development Kit (a8���� FDK)

The a8���� FDK provides the documentation, libraries and examples which enable developers to build new FPGA applications running on a8����'s 7130 platform. The development environment includes:

• Hardware documentation and information (currently supporting the 7130 E, EH, L and LB development standards)
• IP Cores
• Working example applications, including example build systems*
• Support resources to correctly build FPGA applications

* The examples in the a8���� FDK target the MOS operating system, and its MOSAPI SDK. As the 7130 series transitions to EOS, these applications will transition to an enhanced . Please get in touch to discuss your specific SDK feature requirements. EOS application examples will be added in 2021.

The a8���� FDK includes all current a8���� IP Cores (FPGA libraries). These include:

• 10G MAC-PHY IP Core: an Ultrascale/Ultrascale+ MACPHY, which is a combined 10GbE/1GbE, low latency design that implements the MAC, PCS & PMA reconciliation layers as four independent channels grouped per the Xilinx transceiver "Quad."
• 25G MAC-PHY IP Core: an Ultrascale/Ultrascale+ MACPHY, which is a combined 25GbE, low latency design that implements the MAC, PCS & PMA reconciliation layers as four independent channels grouped per the Xilinx transceiver "Quad.��
• Mux IP Core: an Ultrascale+ 10GbE Mux, which is a8����'s low latency MetaMux application in an IP Core, with the addition of fabric AXI4 stream interfaces to inject packets directly from the custom logic.
• TS IP Core: a clock synchronisation and timestamping core which combines both hardware and software components to synchronise the hardware within 7130 to a PPS, PTP or NTP time source, and use that synchronised clock to measure timestamps.

a8���� Switch Development Kit for Vitis^?

is a powerful tool, designed by Xilinx, to better enable FPGA development. Vitis is designed to make it simpler to build FPGA applications using higher-level languages, reusable blocks, and a statically configured Vitis Target Platform in the FPGA. a8���� provides support for Vitis development, via these Vitis Target Platforms which run on the LB development standard and support the many Ethernet interfaces provided by the 7130LB devices. The switch's internal CPU connects via PCIE to the FPGA, and supports XRT, giving a similar development experience to that of a server with an add-in PCIE card.

The a8���� Switch Development Kit for Vitis provides:

• MOS support for running Vitis target platforms. a8����'s MOS includes Xilinx's XRT and its drivers;
• A Vitis target platform for the FPGA in the a8���� 7130 LB devices;
• An a8���� app for managing the shells installed on a switch;
• An a8���� 10GbE Ethernet kernel, including an example application using the Ethernet kernel;
• Example Vitis projects, including Xilinx's Market Maker example, and a software layer used to integrate this into the switch's operating system.

Note: The a8���� FPGA Dev Kit for Vitis supports the MOS Operating System. Along with the a8���� FDK, support for a8����'s EOS will be added in 2021.

Partner Ecosystem

Several tried & tested integrations exist via our technology partners. We enable our partners to deliver value and differentiation in a highly competitive marketplace. Joint innovation with our partners has proven to generate powerful complementary solutions that run on the 7130 platform and offer clients additional capabilities: optimized analytics, data capture solutions, and more.